1. Field of the Invention
The present invention relates to a method for manufacturing a defect-free silicon single crystal by pulling up the silicon single crystal from molten silicon by the CZ method.
2. Related Art
A high-purity silicon single crystal (hereinafter abbreviated as “crystal” in some cases) is used in general for semiconductor device substrates, and the most widely-employed method for manufacturing it is the Czochralski method (hereinafter, CZ method). In an apparatus for manufacturing a silicon single crystal by the CZ method (silicon single crystal pulling apparatus, CZ furnace), a self-rotating crucible 108 is installed at the center of a chamber 102 so that it can freely go up and down as shown in FIG. 19. The crucible 108 consists of a quartz crucible 108b housed in a graphite crucible 108a. Bulk polycrystalline silicon is loaded into the quartz crucible 108b, and the raw material is heated and melted by a cylindrical heater 105 provided surrounding the crucible 108 to produce molten silicon 103. Subsequently, a seed crystal attached to a seed holder 109 is dipped into the molten silicon 103, and the seed holder 109 is pulled upward while the seed holder 109 and the crucible 108 are rotated in the same or opposite directions from each other to let a silicon single crystal 107 grow so as to have a predetermined diameter and length.
In the process of manufacturing the silicon single crystal by the above CZ method, crystal defects that may cause degradation of device characteristics occur in some cases during the growth of the silicon single crystal. These crystal defects become obvious in the process of manufacturing the device, which results in degradation of the device's performance.
It is generally thought that crystal defects include the following three kinds of defects.    (1) Void defects that are thought to occur as a result of aggregation of vacancies    (2) Oxidation Induced Stacking Faults (OSF)    (3) Dislocation cluster defect that are thought to occur as a result of aggregation of interstitial silicon
It is known that the manner in which these crystal defects occur varies as follows depending on the growth conditions.    (1) When the growth speed is high, the silicon single crystal will have excessive vacancies, and only void defects will occur.    (2) When the growth speed gets lower than that in the above case (1), ring-like OSF's will occur in the vicinity of the outer rim of the silicon single crystal, and void defects will occur on the internal side of the OSF portion.    (3) When the growth speed gets further lower than that in the above (2), the radius of the ring-like OSF's will be reduced, dislocation clusters will occur on the external side of the ring-like OSF portion, and void defects will occur on the internal side of the OSF portion.    (4) When the growth speed gets still further lower than that in the above (3), dislocation cluster defects will occur throughout the entire silicon single crystal.
It is thought that the above phenomena occur because the silicon single crystal changes its state from a state of excessive vacancies to a state of excessive interstitial silicon along with a decrease in the growth speed, and it is understood that the change starts at the outer rim side of the silicon single crystal.
OSF's degrade the electrical characteristics, for example, they increase leak currents, and ring-like OSF's contain defects that cause such degradations of the characteristics in a high-density manner. Thus, in a normal process of manufacturing a silicon single crystal, the silicon single crystal is developed with a relatively high pulling speed so that the ring-like OSF's are distributed at the outermost rim of the silicon single crystal. By this method, the majority of the silicon single crystal resides on the internal side of the ring-like OSF, which makes it possible to avoid the dislocation cluster defects. Another reason for locating the majority of the silicon single crystal on the internal side of the ring-like OSF is that the gettering effect against heavy-metal contamination occurring in the device manufacturing process is more significant on the internal side portion of the ring-like OSF than on the external side.
On the other hand, there has recently been a trend towards an increased degree of LSI integration, and as a result of this trend, since gate oxide films are becoming thinner, and the temperature in the device manufacturing process is lower, OSF's which readily occur in high-temperature processes tend to occur less frequently. In addition, there is a trend towards reduced oxygen in the crystal. Thus, OSF's such as ring-like OSF's has been less problematic as a factor which degrades device characteristics.
However, it is apparent that void defects occurring mainly in single crystals growing at high speed significantly degrade the pressure resistance characteristics of thinner gate oxide films. This impact is greater especially as device patterns become more precise, which will make it difficult to attempt a high degree of integration.
Accordingly, in the recent manufacture of silicon single crystals, it has become more important to avoid void defects and dislocation cluster defects (hereinafter, defects including these defects shall be referred to as “grown-in defects”).
However, even if a silicon single crystal with no grown-in defects (hereinafter referred to as a “defect-free silicon single crystal”, which specifically means a silicon single crystal with no grown-in defects when the silicon single crystal is cut in a horizontal direction including the radius direction of the silicon single crystal) is manufactured successfully, the production efficiency is lowered when the pulling speed of the silicon single crystal is low. Thus, it is also an important goal in the silicon single crystal manufacturing process to increase the pulling speed of the single crystal as much as possible. It is further important to extend the allowable range of the pulling speed of the silicon single crystal since the wider the allowable range of the pulling speed of the silicon single crystal is, the more stably defect-free silicon single crystals can be manufactured. Meanwhile, the allowable range of the pulling speed of the silicon single crystal means a range of pulling speeds of the silicon single crystal over which a defect-free silicon single crystal can be produced under predetermined conditions.
Japanese Unexamined Patent Application Publication No. 2001-261495 (hereinafter referred to as Patent Document 1) discloses that conditions for increasing the pulling speed of silicon single crystals and manufacturing defect-free silicon single crystals stably are “to enlarge the temperature gradient in the longitudinal direction of the side surface of the silicon single crystal (temperature gradient on the side surface of the silicon single crystal in the longitudinal direction of the silicon single crystal, temperature gradient on the side surface of the crystal) and to raise the height of the solid-liquid interface”. Meanwhile, “the height of the solid-liquid interface” is defined as the height h of a solid-liquid interface 114 at a crystal center line 107a of the silicon single crystal 107 (that is, the height h of the solid-liquid interface at the crystal center) as shown in FIG. 20. Also, “the temperature gradient on the side surface of the crystal” means the temperature gradient in the longitudinal direction on a side surface 107b of the silicon single crystal 107, and conditions in which this “temperature gradient on the side surface of the crystal” is enlarged is hereinafter referred to as a “large temperature gradient condition”.
However, prior art documents do not disclose specifically the means or conditions under which the silicon single crystal may be pulled up in order to “enlarge the temperature gradient on the side surface of the crystal and to raise the height of the solid-liquid interface”.
For example, Japanese Patent No. 3573045 (hereinafter referred to as Patent Document 2) discloses an invention using a cooling member (cooler) to enlarge the temperature gradient on the side surface of the crystal in manufacturing a high-quality silicon single crystal. More specifically, it proposes an invention defining the arrangement and dimensions of a cooling member (cooler) 120 (refer to FIG. 19), the extent (high/low) of the temperature at the central part and at the circumferential part (side surface of the crystal) of the silicon single crystal within the temperature range from the solidifying point to 1250 degrees C., and the extent (large/small) of the temperature gradient at the central part and at the circumferential part of the silicon single crystal, as an invention of a method for enabling the stable manufacture of defect-free silicon single crystals.
However, Patent Document 2 discloses nothing about the height of the solid-liquid interface. As will be described hereinbelow, since the height of the solid-liquid interface varies depending on the conditions of pulling up the silicon single crystal, defect-free silicon single crystals may not be obtained even when the silicon single crystal is pulled up under the same conditions as in the invention disclosed in Patent Document 2. That is, since the invention disclosed in Patent Document 2 does not define anything about the height of the solid-liquid interface, defect-free silicon single crystals can be manufactured in some cases and cannot be manufactured in other cases depending on the conditions of pulling up the silicon single crystal when the invention is practiced.
Further, Patent Document 2 does not disclose specifically how to embody the configuration of the invention disclosed in Patent Document 2, for example, the extent (high/low) of the temperature at the central part and at the circumferential part of the silicon single crystal, the extent (large/small) of the temperature gradient at the central part and at the circumferential part of the silicon single crystal, and so on.
Also, Japanese Unexamined Patent Application Publication No. 2000-72590 (hereinafter referred to as Patent Document 3) proposes an invention of a method for developing defect-free silicon single crystals by controlling the number of rotations of a crucible per unit time (rotation speed of the crucible) and the number of rotations of the silicon single crystal per unit time (rotation speed of the silicon single crystal). Specifically, as conditions of pulling up the silicon single crystal for minimizing grown-in defects, the number of rotations of the silicon single crystal per unit time is set to 13 rotations/min or more, and the number of rotations of the crucible per unit time is set to 5 rotations/min or less. An object of this invention is to obtain defect-free silicon single crystals by reducing the pulling speed of the silicon single crystal so that the ring-like OSF is located at the central side of the silicon wafer and making the shape of the solid-liquid interface flat or upward-projecting convex.
However, the invention disclosed in Patent Document 3 does not show if the height of the solid-liquid interface can be raised sufficiently even in the case of the large temperature gradient condition using a cooling member. Meanwhile, the oxygen concentration is an important quality management issue in manufacturing silicon wafers. This is because silicon wafers cut out from a portion of a silicon single crystal where the oxygen concentration is high tend to have surface defects as the oxygen in the crystal is precipitated during a heat treatment. Thus, it is at least desired that the oxygen concentration in the silicon single crystal should be constant in the longitudinal direction of the crystal. However, if the rotation speed of the crucible is changed, the oxygen concentration in the silicon single crystal may be changed in the longitudinal direction of the crystal. Therefore, the invention disclosed in Patent Document 3 is not practical.
Further, Japanese Unexamined Patent Application Publication No. 2001-261482 (hereinafter referred to as Patent Document 4) discloses an invention of a method for restricting the occurrence of dislocation cluster defects by adjusting the output (heater power ratio) of a multi-heater separated in the up and down directions, instead of the heater 105 shown in FIG. 19, to result in different heating distributions for the molten silicon in a crucible in the up and down directions.
However, the invention disclosed in Patent Document 4 does not show if the height of the solid-liquid interface can be raised sufficiently even in the case of a large temperature gradient condition using a cooling member. Also, the oxygen concentration in the silicon single crystal is determined by the amount of oxygen eluted into the molten silicon from the inner wall at the bottom portion of the crucible. When the heater power ratio is adjusted, the amount of oxygen eluted into the molten silicon is changed as a matter of course. Thus, if the heater power ratio is adjusted, the oxygen concentration in the longitudinal direction in the silicon single crystal needs to be controlled to maintain the specifications. However, Patent Document 4 makes no mention of this.
As described above, various proposals are provided about how to raise the height of the solid-liquid interface under a large temperature gradient in order to manufacture a defect-free silicon single crystal rapidly and stably, but specific means and conditions have not always been disclosed. Also, even if the height of the solid-liquid interface were raised sufficiently under the conditions of a large temperature gradient by the aforementioned methods, no specific manufacturing conditions are provided, and the aforementioned proposes are problematic in that the oxygen concentration in the silicon single crystal, which is an important quality management issue in manufacturing silicon single crystals, is not controlled.